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Hardware / Software Development

Challenger to x86 RISEs to Solve the Software Problem

The goal is to create the underlying software tools and middleware that developers will need to write applications for devices or servers with RISC-V chips.
Jun 12th, 2023 11:00am by
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A new chip architecture called RISC-V is emerging as a hot-ticket item to unseat the dominant x86 processor in computer hardware, but it has a problem — it has poor software support.

To solve that problem, some of the biggest names in tech have joined hands to establish RISC-V Software Ecosystem, also called RISE, which is a consortium to promote software development for the free-to-license RISC-V instruction set architecture.

The goal is to create the underlying software tools and middleware that developers will need to write applications for devices or servers with RISC-V chips.

Invoking ARM

The consortium is similar in nature to Linaro, which was formed in 2010 to boost software development for the ARM architecture, which at the time was widespread in smartphones, but was being investigated for PCs and servers. Linaro played a major role in expanding software support to make ARM a viable alternative to x86 for cloud-native applications.

Today, RISC-V is where ARM was in 2010 — an emerging architecture with limited software support, but a legitimate threat to x86 and ARM. Just like Linaro, RISE aims to create software support to boost the adoption of RISC-V chips, which is expected to pick up in the next decade.

The founding companies behind RISE include Google, Intel, Nvidia, Qualcomm, Samsung, and Ventana. These companies are using or have shown an interest in RISC-V architecture.

On the software side, Google has announced Android support for RISC-V, and developed a new OS called KataOS or RISC-V architecture. Linux and middleware distributor Red Hat is also a founding member of RISE.

Intel is diversifying outside of its homegrown x86 architecture and is embracing RISC-V and ARM processors as it prioritizes the manufacturing of chips.

What Is RISC-V?

The RISC-V instruction set architecture has been called the Linux of chips as it is free to use and license. The architecture is much leaner than standard x86 or ARM ISAs but has a Lego-like design approach to constructing chips by putting processing blocks together.

Companies can create custom chips by adding their own silicon blocks on top of the instruction set. As a result, chip designers can create leaner and more power-efficient chips with only the modules they need. Proponents argue that is a better chip design compared to the one-size-fits-all x86 chip approach of Intel and AMD. Chips based on the ARM ISA are customizable, but not to the extent of RISC-V.

About 10 billion RISC-V cores were on the market by the end of 2022, said RISC-V International, which is the organization overseeing the development of the RISC-V standard. That is a big number, but RISC-V chips have not made it to name-brand smartphones, PCs, or servers.

RISC-V has gained popularity in microcontrollers and is replacing an aging population of ARM-based controllers that dominated for decades. For example, Nvidia is using RISC-V controllers in its GPUs, and Apple is also using RISC-V controllers alongside its ARM-based chips in its Macs.

Companies such as SiFive and Alibaba have shipped high-performance development boards and chips, which are being used by enthusiasts and DIY users. The European Commission is also funding numerous research projects to create homegrown, open source RISC-V chips with the goal to cut ties with proprietary chip designs like x86 and ARM.

The Opportunity

The lack of software support is an impediment that is blocking wide adoption of RISC-V, and RISE hopes to solve that problem. A solid software stack will lift RISC-V into the mainstream computing markets.

RISC-V support is already built into Linux, with developers making upstream contributions to the kernel. RISE said it will focus on providing cohesive support for Linux distributions that run on RISC-V systems.

The RISE project will help in the creation of RISC-V binaries and applications through tools and libraries such as the open source GCC compiler and LLVM toolchain.

Options for RISC-V Linux distros are limited. Ubuntu’s Linux distro supports 93% of all packages for RISC-V and is popular among enthusiasts testing out RISC-V boards from SiFive, StarFive, and Allwinner.

RISE will focus on integration with Ubuntu/Debian, Red Hat/Fedora, and Alpine, the consortium said on its site. Developers using Ubuntu can already use interfaces such as KDE and Gnome, and development tools that include C, C++, Python, Java, OpenJDK, Node.js, and Go.

Support for the .Net environment is coming to RISC-V, said Canonical’s Heinrich Schuchardt, in an April presentation.

RISE also focuses on Python, OpenJDK/Java, V8 runtimes, the QEMU emulator, and the ACPI and UEFI system firmware. It is also focused on common system libraries such as OpenSSL and OpenBLAS.

The Problem

Nvidia, which dominates AI software development with its CUDA parallel programming framework, has said it is not looking to bring RISC-V support to its GPUs.

“We like RISC-V because is it open source… but more importantly, it’s adaptable. We can use it for all kinds of interesting configurations of CPUs. However, RISC-V is not appropriate yet and not for some time for external third-party software,” Nvidia CEO Jensen Huang said last year.

Chip makers can add their own silicon modules to the base instruction set. Those modules could be proprietary and not a standard RISC-V module, which companies can then sell as an add-on to customers. Chip makers will have to develop their own drivers, and may not get support from RISE, which will provide the base software tools to support the open source instruction set.

Breaking the X86 Chokehold

The low-hanging fruit for RISC-V is the microcontroller market, and RISE could focus initially on the IoT and embedded markets. But in the long-term goal, RISC-V wants to unseat x86 and ARM in the mobile, PC, and cloud infrastructure.

The embedded market still largely relies on the C and C++ programming languages. The software development may get complicated as it enters the PC and server markets, which will involve more customized RISC-V chips, and more programming tools, containers and virtualization technologies.

Ventana, which is also a member of RISE, has developed a high-performance RISC-V server chip called Veyron V1 that the company claims will offer performance comparable to x86 and ARM-based chips. But for Ventana to get customers, it will also have to sell a comprehensive software stack that is tuned to its custom RISC-V chips, which includes proprietary modules. The chip supports Linux and MySQL and Apache web-serving software, which is similar to the early ARM chips running the LAMP stack.

Hardware makers betting on RISC-V are already bringing OS support. Alibaba has ported Android to RISC-V, and has become an important RISC-V software contributor.

Developers are also making contributions so Firefox can run faster on RISC-V systems.

The chair of RISE is Amber Huffman, principal engineer at Google Cloud. Other notable board members include Daniel Park, who leads open source efforts at Samsung, Lars Bergstom, who is director of engineering at Google, and Mark Skarpness, who runs system software engineering at Intel.

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